FPGA Design Verification Professional
10 Days Ago
₹ Not disclosed Bengaluru
Candidate must have experience with architecting the test-plan & test benchProject based work experience with UVM & VMM methodologiesHands on experience with OTN,Ethernet based protocols,PCIe,AXI,I2C,...view more
ASIC Design Verification Engineer / UVM
23 Days Ago
₹ Not disclosed Bengaluru
Bachelors degree or masters Degree in equivalent experience in EE,CE,or other related fieldExperience building test benches from scratch,hands on experience with System Verilog constraints,structures ...view more